Data processing systems typically incorporate memory caches to improve system performance. A memory cache stores a subset of the contents of the data processing system's main memory that it frequently accesses. The contents of the memory cache may be data, may be instructions, or may be a combination of the data and instructions. A memory cache increases the performance of the data processor because the data processor can access the contents of the memory cache faster than it can access the contents of the main memory. The data processor can access the contents of the memory cache faster because the memory cache is (1) fabricated from faster components than is the main memory, (2) is accessed by the data processor through a dedicated bus, (3) is integrated on to the same semiconductor device as is the data processor, or (4) any combination of (1), (2) and (3).
A data processor incorporating a memory cache firsts determines if its memory cache contains a requested piece of data before requesting the data from a location in main memory. If the memory cache does contain the data, a "cache hit," then the data processor can quickly access and use the data. If the memory cache does not contain the data, a "cache miss," then the data processor must request the data from main memory. This process can take a relatively long time to complete.
Some data processors employ a data forwarding structure to reduce the interval between the time a cache miss occurs and the time the data is available for use by the data processor. A data forwarding structure compares the address of the data returned from main memory as it comes into the memory cache with the address of whatever data, if any, is presently being requested from the memory cache. If these two addresses match, then the memory cache forwards the data to the portion of the data processor that is requesting the data. The memory cache also stores the data in the memory cache for later use. If the two addresses do not match, then the portion of the data processor that is requesting the data accesses the memory cache as described above. This methodology is particularly useful in data processors that store instructions in one memory cache, an "instruction cache," and that store data in a second memory cache, a "data cache." This type of architecture is known as a "Harvard architecture." In an instruction cache, it is often the case that the address of the incoming instruction and the address of the requested instruction match. Therefore, the requested instruction will be available for execution one or more cycles earlier than without the data forwarding structure.
A data forwarding structure is not without its disadvantages. Primarily, data processors that employ data forwarding structures also incorporate address mapping. This combination is problematic. Data processors that incorporate address mapping use one address to internally index each memory location, "an effective address," and a second address to externally index each memory address, "a physical address." These data processors maintain one or more tables to translate between the two indexing systems when transferring data between the data processor and the external data processing system. A data forwarding structure must perform an address comparison between two addresses which are both physical addresses. This requirement implies that the data forwarding structure must serially translate the effective address of the requested data into a physical address, compare the two addresses described above, and then select a source from which it will supply the requested data. Although these steps are straight forward, they may require more time to complete than any other combination of steps performed by the instruction cache, the instruction cache's "speed path."